SiEPIC 0.5.17

SiEPIC-Tools: for silicon photonics layout, design, verification and circuit simulation

SiEPIC-Tools

• SiEPIC-Tools - for silicon photonics layout, design, verification and circuit simulation
• Developed within the SiEPIC program, by Lukas Chrostowski, with contributions from many others.
• This is a package implemented using Python in KLayout.
• Instruction on design, layout, fabrication, test, data analysis for silicon photonics provided in the edX course: Silicon Photonics Design, Fabrication and Data Analysis and textbook Silicon Photonics Design: From Devices to Systems by Lukas Chrostowski and Michael Hochberg.
• Process Design Kits that use KLayout SiEPIC-Tools are available for multiple foundries including AMF, AIM Photonics, Tower Semiconductor, Ligentec, Applied Nanotools Inc., and SiEPICfab.
• Citing this work:
  • Lukas Chrostowski, Zeqin Lu, Jonas Flueckiger, Xu Wang, Jackson Klein, Amy Liu, Jaspreet Jhoja, James Pond, "Design and simulation of silicon photonic schematics and layouts," Proc. SPIE 9891, Silicon Photonics and Photonic Integrated Circuits V, 989114 (May 13, 2016); doi:10.1117/12.2230376.
  • Lukas Chrostowski, Hossam Shoman, Mustafa Hammood, Han Yun, Jaspreet Jhoja, Enxiao Luan, Stephen Lin, Ajay Mistry, Donald Witt, Nicolas A. F. Jaeger, Sudip Shekhar, Hasitha Jayatilleka, Philippe Jean, Simon B.-de Villers, Jonathan Cauchon, Wei Shi, Cameron Horvath, Jocelyn N. Westwood-Bachman, Kevin Setzer, Mirwais Aktary, N. Shane Patrick, Richard Bojko, Amin Khavasi, Xu Wang, Thomas Ferreira de Lima, Alexander N. Tait, Paul R. Prucnal, David E. Hagan, Doris Stevanovic, Andy P. Knights, "Silicon Photonic Circuit Design Using Rapid Prototyping Foundry Process Design Kits" IEEE Journal of Selected Topics in Quantum Electronics, Volume: 25, Issue: 5, Sept.-Oct. 2019. (PDF)