This project is designed to build a simulator for the Arduino Uno processor used in projects in my COSC2325 Computer Architecture and Machine Language class at Austin Community College.
The project is written in Python (tested on py2.7 and py3.5). It uses the MyHDL hardware description library to build a simulation that can be converted to real hardware using an FPGA. The current project targets the Basys3 (Artix 7 FPGA) board produced by Digilent.
For more information on the project, contact the author:
Roie Black Professor, Computer Science Austin Community College Austin, Texas email: rblack@austincc.edu web: www.austincc.edu/rblack GitHub: http://github.com/rblack42/AVRsim
Metadata
Release files for avrsim 0.1.2
For a detailed explanation of source distributions (sdists) and built distributions (wheels), please see the package formats documentation.
Source distribution (sdist)
| File | Size | Uploaded | |
|---|---|---|---|
| avrsim-0.1.2.tar.gz | 3.0 kB | Details |
Release files / avrsim-0.1.2.tar.gz
| Download URL | avrsim-0.1.2.tar.gz |
|---|---|
| Size | 3.0 kB |
| Tags | Source |
|
SHA-256 checksum How to use checksums |
793650dc20e4fceb5405ba4863b5a0f9c6f127ab8f6a278193adeaaa6ed1af3a
|
|
BLAKE2b-256 checksum How to use checksums |
323132d1eef6ca44514b86907117bbeb5b991cd22a1b36b60955e9ffe299caa4
|
| Upload date | |
|
Uploaded using Trusted Publishing? What is trusted publishing? |
No |