example implementation of FreePDK45 as PDKMaster based PDK
PDKMaster based FreePDK45 PDK
This is an example implementation of the non-manufacturable FreePDK45 as a PDKMaster based PDK under the Chips4Makers umbrella. One of it's functions is to be a guide for making new PDKMaster PDKs for manufacturable processes.
This packages is released in two different formats. First is a release on PyPI with only the python package included. Second is a tarball release on github. Next to the installable python package also contains the generated setup files for other tools and examples of how the PDKMaster FreePDK45 can be used.
Current release is v0.0.1:
Source repository overview
Currently this repo lacks documentation. So, as an introduction to the package here an overview is given of the several parts in the repo with a short description:
c4m/pdk/freepdk/: The PDKMaster Technology python module, including c4m-flexcell based standard cell library.
scripts/: generate several release files:
- copy of python module
- views of the standard cells using the PDKMaster export functionalities:
- spice netlist
- verilog behavioral model
- vhdl behavioral model
- gds layouts
- liberty file for library
make_in_docker.py: Will run the building of everything from the
Makefilein a docker prepared docker container. Currently the the docker image to download is 2.3GB in size.
portfolio.ipynb: Python notebook show (part of) the FreePDK45 content
arlet6502/*: Directory with Arlet's 6502 implementation and example flow of how to do synthesis and P&R using the FreePDK45 FlexLib standard cells library. When using it from a git checkout first the coriolis files will need to be built in the top directory. In the release package this will be included and not be needed.
make_in_docker.sh: you can also here run the flow inside a docker container of not all tools are installed locally. The same 2.3GB docker image is used for the
make_in_docker.shfrom the top directory.
inverter/inverter.ipynb: Python notebook showing how the PDKMaster framework can be used to design a balanced inverter. It combines several design aspects in one integrated flow:
- spice simulation to compute the width of the inverter's NMOS and PMOS transistors to be balanced, e.g the same on current.
- generate minimal area layout based on the design rules
- Verify functionality using Spice simulation.
This repository is currently using PDKMaster and c4m-flexcell which currently have unstable APIs. Heavy non-backwards compatible changes are still be expected. If interested head over to gitter for further discussion.
The PyPi release only contains the PDKMaster Technology definition; the gitlab release also contains all the generated views and example design files.
Download the file for your platform. If you're not sure which to choose, learn more about installing packages.
|Filename, size||File type||Python version||Upload date||Hashes|
|Filename, size c4m_pdk_freepdk45-0.0.1-py3-none-any.whl (19.4 kB)||File type Wheel||Python version py3||Upload date||Hashes View|
|Filename, size c4m_pdk_freepdk45-0.0.1.tar.gz (140.4 kB)||File type Source||Python version None||Upload date||Hashes View|
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