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Open-source project from Xilinx® that enables high-level control of Versal debug IP running in hardware

Project description

🐍 ChipScoPy README

ChipScoPy is an open-source project from Xilinx® that enables high-level control of Versal debug IP running in hardware. Using a simple Python API, developers can control and communicate with ChipScope® debug IP such as the Integrated Logic Analyzer (ILA), Virtual IO (VIO), device memory access, and more.

ChipScoPy communicates with Versal devices. It does not work with older devices such as Ultrascale+ and 7-Series devices.



ChipScoPy Overview


System Requirements


ChipScoPy Installation


ChipScoPy Examples


FAQ


API Documentation


Project details


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