HDL code checker
Project description
HDL Checker
HDL Checker is a language server that wraps VHDL/Verilg/SystemVerilog tools that aims to reduce the boilerplate code needed to set things up. It supports Language Server Protocol or a custom HTTP interface; can infer library VHDL files likely belong to, besides working out mixed language dependencies, compilation order, interpreting some compilers messages and providing some (limited) static checks.
Installation
pip install hdl-checker --upgrade
or
pip install hdl-checker --user --upgrade
(Need to add $HOME/.local/bin
to your PATH
environment variable)
Editor support
Editor | Info |
---|---|
Vim - dense-analysis/ale | Soon, see (PR #2804) |
Vim - coc.vim | Will add instructions to the Wiki soon |
VSCode | HDL Checker HDL Checker VSCode client |
Usage
HDL Checker server can be started via hdl_checker
command. Use hdl_checker --help
for more info on how to use it.
$ hdl_checker -h
usage: hdl_checker [-h] [--host HOST] [--port PORT] [--lsp]
[--attach-to-pid ATTACH_TO_PID] [--log-level LOG_LEVEL]
[--log-stream LOG_STREAM] [--stdout STDOUT]
[--stderr STDERR] [--version]
optional arguments:
-h, --help show this help message and exit
--host HOST [HTTP] Host to serve
--port PORT [HTTP] Port to serve
--lsp Starts the server in LSP mode. Defaults to false
--attach-to-pid ATTACH_TO_PID
[HTTP, LSP] Stops the server if given PID is not
active
--log-level LOG_LEVEL
[HTTP, LSP] Logging level
--log-stream LOG_STREAM
[HTTP, LSP] Log file, defaults to stdout when in HTTP
or a temporary file named hdl_checker_log_pid<PID>.log when
in LSP mode
--stdout STDOUT [HTTP] File to redirect stdout to. Defaults to a
temporary file named hdl_checker_stdout_pid<PID>.log
--stderr STDERR [HTTP] File to redirect stdout to. Defaults to a
temporary file named hdl_checker_stderr_pid<PID>.log
--version, -V Prints hdl_checker version and exit
Third-party tools
HDL Checker supports
- Mentor ModelSim
- ModelSim Intel FPGA Edition
- GHDL
- Vivado Simulator (bundled with Xilinx Vivado)
Configuring HDL Checker
See the Setting up a new project section on the wiki.
LSP server
HDL Checker has beta support for Language Server Protocol. To start in LSP mode:
hdl_checker --lsp
On a Linux system, log file will be at /tmp/hdl_checker_log_pid<PID_NUMBER>.log
and
/tmp/hdl_checker_stderr_pid<PID_NUMBER>.log
.
As a language server, HDL Checker will provide
- Diagnostics
- Hover information
- Dependencies: will report which path and library have been assigned
- Design units: will report the compilation sequence and libraries
- Go to definition of dependencies
HTTP server
HDL Checker can be used in HTTP server mode also:
hdl_checker
Please note that this mode does not use LSP to communicate. Request/response API is not yet available, but a reference implementation can be found in vim-hdl
Testing
HDL Checker uses a docker container to run tests. If you wish to run them, clone this repository and on the root folder run
./run_tests.sh
The container used for testing is suoto/hdl_checker_test
Supported systems
System | CI | CI status |
---|---|---|
Linux | Yes | |
Windows | Yes |
Style checking
Style checks are independent of a third-party compiler. Checking includes:
- Unused signals, constants, generics, shared variables, libraries, types and attributes
- Comment tags (
FIXME
,TODO
,XXX
)
Notice that currently the unused reports has caveats, namely declarations with
the same name inherited from a component, function, procedure, etc. In the
following example, the signal rdy
won't be reported as unused in spite of the
fact it is not used.
signal rdy, refclk, rst : std_logic;
...
idelay_ctrl_u : idelay_ctrl
port map (rdy => open,
refclk => refclk,
rst => rst);
Issues
You can use the issue tracker for bugs, feature request and so on.
License
This software is licensed under the GPL v3 license.
Notice
Mentor Graphics®, ModelSim® and their respective logos are trademarks or registered trademarks of Mentor Graphics, Inc.
Intel® and its logo is a trademark or registered trademark of Intel Corporation.
Xilinx® and its logo is a trademark or registered trademark of Xilinx, Inc.
HDL Checker's author has no connection or affiliation to any of the trademarks mentioned or used by this software.
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