Generic SoC builder in HDL

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License: MIT License

Author: aignacio (Anderson Ignacio)

Tags soc, mpsoc, hdl, verilog, systemverilog, builder

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Project description

IP SoC Generator

To contribute

Please follow the steps below to build the virtual environment and install the dependencies.

python3 -m venv venv
source venv/bin/activate 
python3 setup.py install

Project details

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Maintainers
Avatar for aignacio from gravatar.com aignacio

Unverified details

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Project links
GitHub Statistics

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Meta

License: MIT License

Author: aignacio (Anderson Ignacio)

Tags soc, mpsoc, hdl, verilog, systemverilog, builder

Classifiers

Release history Release notifications | RSS feed

0.1.39

0.1.38

0.1.37

0.1.36

0.1.35

0.1.34

0.1.33

0.1.32

0.1.31

0.1.30

0.1.29

0.1.28

0.1.27

0.1.26

0.1.25

0.1.24

0.1.22

0.1.21

0.1.19

This version

0.1.17

0.1.16

0.1.15

0.1.14

0.1.13

0.1.12

0.1.11

0.1.9

0.1.8

0.1.7

0.1.6

0.1.5

0.1.4

0.1.3

0.1.2

0.1.0

0.0.16

0.0.14

0.0.13

0.0.12

0.0.11

0.0.3

0.0.1

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ipsocgen-0.1.17-py3-none-any.whl (26.4 kB view hashes)

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