Skip to main content

An infrastructure for implementing chip design flows

Project description

Banner explaining that OpenLane 2.0 is not the primary supported option for hardening Caravel User Project-based designs targeting chipIgnite

OpenLane

License: Apache 2.0 Python 3.8 or higher Code Style: black Checked with mypy Built with Nix

Open in Colab Documentation Build Status Badge Invite to the Open Source Silicon Slack

OpenLane is an ASIC infrastructure library based on several components including OpenROAD, Yosys, Magic, Netgen, CVC, KLayout and a number of custom scripts for design exploration and optimization.

A reference flow, "Classic", performs all ASIC implementation steps from RTL all the way down to GDSII.

You can find the documentation here to get started. You can discuss OpenLane 2 in the #openlane-2 channel of the Efabless Open Source Silicon Slack.

timeline
  title The OpenLane Infrastructure
  RTL to Netlist
    : Linting / Verilator
    : Power Distribution Network Hierarchy / Yosys
    : Synthesis / Yosys
    : Synthesis / Design Compiler (with proprietary plugin)
    : Multi-corner Netlist STA / OpenSTA
  Floorplanning
    : Floorplan Initialization / OpenROAD
    : Manual Macro Placement / OpenDB
    : Tap/Endcap Insertion / OpenROAD
    : PDN Generation / OpenROAD
  Placement
    : Pin Placement (from config file) / OpenROAD, OpenDB
    : Pin Placement (Random/Matching/Annealing) / OpenROAD
    : Pin Placement (from template DEF) / OpenDB
    : Global Placement / OpenROAD
    : Resizer Design Repair (Post-GPL) / OpenROAD
    : Detailed Placement / OpenROAD
  Clock Tree Synthesis
    : Clock-Tree Synthesis / OpenROAD
    : Resizer Timing Repair (Post-CTS) / OpenROAD
  Routing
    : Global Routing / OpenROAD
    : Resizer Design Repair (Post-GRT) / OpenROAD
    : Diode Insertion on Ports / OpenDB
    : Heuristic Diode Insertion / OpenDB
    : Antenna Repair / OpenROAD
    : Resizer Timing Repair (Post-GRT) / OpenROAD
    : Detailed Routing / OpenROAD
    : Row Filling / OpenROAD
  Signoff (Timing)
    : Parasitics Extraction / OpenROAD
    : Multi-corner Static Timing Analysis / OpenSTA
    : SI-Enabled Multi-corner Static Timing Analysis / PrimeTime (with proprietary plugin)
  Signoff (Physical)
    : GDSII Stream-Out / Magic
    : GDSII Stream-Out / KLayout
    : Magic vs. KLayout Stream XOR / KLayout
    : Design Rule Checks / Magic
    : Design Rule Checks / KLayout
    : Spice Extraction / Magic
    : Layout vs. Schematic / Netgen
    : Equivalence Check (Alpha) / Yosys EQY

Try it out

You can try OpenLane right in your browser, free-of-charge, using Google Colaboratory by following this link.

Installation

You'll need the following:

  • Python 3.8 or higher with PIP, Venv and Tkinter

Nix (Recommended)

Works for macOS and Linux (x86-64 and aarch64). Recommended, as it is more integrated with your filesystem and overall has less upload and download deltas.

See Nix-based installation in the docs for more info.

Docker

Works for Windows, macOS and Linux (x86-64 and aarch64).

See Docker-based installation in the docs for more info.

Do note you'll need to add --dockerized right after openlane in most CLI invocations.

Python-only Installation (Advanced, Not Recommended)

You'll need to bring your own compiled utilities, but otherwise, simply install OpenLane as follows:

python3 -m pip install --upgrade openlane

Python-only installations are presently unsupported and entirely at your own risk.

Usage

In the root folder of the repository, you may invoke:

python3 -m openlane --pdk-root <path/to/pdk> </path/to/config.json>

To start with, you can try:

python3 -m openlane --pdk-root $HOME/.volare ./designs/spm/config.json

Publication

If you use OpenLane in your research, please cite the following paper.

  • M. Shalan and T. Edwards, “Building OpenLANE: A 130nm OpenROAD-based Tapeout-Proven Flow: Invited Paper,” 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), San Diego, CA, USA, 2020, pp. 1-6. Paper
@INPROCEEDINGS{9256623,
  author={Shalan, Mohamed and Edwards, Tim},
  booktitle={2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)}, 
  title={Building OpenLANE: A 130nm OpenROAD-based Tapeout- Proven Flow : Invited Paper}, 
  year={2020},
  volume={},
  number={},
  pages={1-6},
  doi={}}

License and Information

The Apache License, version 2.0.

Docker images distributed by Efabless Corporation under the same license.

Binaries bundled with OpenLane either via Cachix or Docker are distributed by Efabless Corporation and may fall under stricter open source licenses.

Project details


Release history Release notifications | RSS feed

Download files

Download the file for your platform. If you're not sure which to choose, learn more about installing packages.

Source Distribution

openlane-2.1.5.tar.gz (264.2 kB view hashes)

Uploaded Source

Built Distribution

openlane-2.1.5-py3-none-any.whl (365.5 kB view hashes)

Uploaded Python 3

Supported by

AWS AWS Cloud computing and Security Sponsor Datadog Datadog Monitoring Fastly Fastly CDN Google Google Download Analytics Microsoft Microsoft PSF Sponsor Pingdom Pingdom Monitoring Sentry Sentry Error logging StatusPage StatusPage Status page