PyPI recent updates for pyxhdl https://pypi.org/project/pyxhdl/ Recent updates to the Python Package Index for pyxhdl en 0.53 https://pypi.org/project/pyxhdl/0.53/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Tue, 05 May 2026 08:19:31 GMT 0.52 https://pypi.org/project/pyxhdl/0.52/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Fri, 24 Apr 2026 13:40:14 GMT 0.51 https://pypi.org/project/pyxhdl/0.51/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Tue, 21 Apr 2026 06:44:04 GMT 0.50 https://pypi.org/project/pyxhdl/0.50/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Thu, 16 Apr 2026 15:43:36 GMT 0.49 https://pypi.org/project/pyxhdl/0.49/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Thu, 16 Apr 2026 15:27:59 GMT 0.48 https://pypi.org/project/pyxhdl/0.48/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Tue, 14 Apr 2026 15:24:11 GMT 0.47 https://pypi.org/project/pyxhdl/0.47/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Mon, 13 Apr 2026 15:20:24 GMT 0.46 https://pypi.org/project/pyxhdl/0.46/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Sun, 12 Apr 2026 07:15:56 GMT 0.45 https://pypi.org/project/pyxhdl/0.45/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Thu, 09 Apr 2026 05:48:35 GMT 0.44 https://pypi.org/project/pyxhdl/0.44/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Wed, 01 Apr 2026 06:17:44 GMT 0.43 https://pypi.org/project/pyxhdl/0.43/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Sun, 22 Mar 2026 07:20:18 GMT 0.42 https://pypi.org/project/pyxhdl/0.42/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Fri, 20 Mar 2026 06:34:37 GMT 0.41 https://pypi.org/project/pyxhdl/0.41/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Mon, 16 Mar 2026 18:11:07 GMT 0.40 https://pypi.org/project/pyxhdl/0.40/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Fri, 13 Mar 2026 16:47:03 GMT 0.38 https://pypi.org/project/pyxhdl/0.38/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Thu, 12 Mar 2026 06:48:41 GMT 0.37 https://pypi.org/project/pyxhdl/0.37/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Sat, 07 Mar 2026 06:28:35 GMT 0.36 https://pypi.org/project/pyxhdl/0.36/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Fri, 06 Mar 2026 07:14:20 GMT 0.35 https://pypi.org/project/pyxhdl/0.35/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Tue, 24 Feb 2026 18:17:22 GMT 0.34 https://pypi.org/project/pyxhdl/0.34/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Mon, 23 Feb 2026 07:50:50 GMT 0.33 https://pypi.org/project/pyxhdl/0.33/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Fri, 20 Feb 2026 17:57:14 GMT 0.32 https://pypi.org/project/pyxhdl/0.32/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Wed, 18 Feb 2026 08:32:02 GMT 0.31 https://pypi.org/project/pyxhdl/0.31/ Use Python as HDL language, and generate equivalent SystemVerilog and VHDL code Wed, 18 Feb 2026 08:28:35 GMT