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    <title>PyPI recent updates for speja</title>
    <link>https://pypi.org/project/speja/</link>
    <description>Recent updates to the Python Package Index for speja</description>
    <language>en</language>    <item>
      <title>0.14.5</title>
      <link>https://pypi.org/project/speja/0.14.5/</link>
      <description>Catch VHDL bugs before simulation: a fast Rust formatter and linter with VSG-compatible rules and configuration.</description>
      <pubDate>Thu, 24 Sep 2026 21:14:31 GMT</pubDate>
    </item>    <item>
      <title>0.14.4</title>
      <link>https://pypi.org/project/speja/0.14.4/</link>
      <description>Catch VHDL bugs before simulation: a fast Rust formatter and linter with VSG-compatible rules and configuration.</description>
      <pubDate>Wed, 23 Sep 2026 14:50:09 GMT</pubDate>
    </item>    <item>
      <title>0.14.3</title>
      <link>https://pypi.org/project/speja/0.14.3/</link>
      <description>Catch VHDL bugs before simulation: a fast Rust formatter and linter with VSG-compatible rules and configuration.</description>
      <pubDate>Wed, 23 Sep 2026 07:49:42 GMT</pubDate>
    </item>    <item>
      <title>0.14.2</title>
      <link>https://pypi.org/project/speja/0.14.2/</link>
      <description>Catch VHDL bugs before simulation: a fast Rust formatter and linter with VSG-compatible rules and configuration.</description>
      <pubDate>Wed, 23 Sep 2026 06:56:41 GMT</pubDate>
    </item>    <item>
      <title>0.14.1</title>
      <link>https://pypi.org/project/speja/0.14.1/</link>
      <description>Catch VHDL bugs before simulation: a fast Rust formatter and linter with VSG-compatible rules and configuration.</description>
      <pubDate>Tue, 22 Sep 2026 22:51:14 GMT</pubDate>
    </item>    <item>
      <title>0.14.0</title>
      <link>https://pypi.org/project/speja/0.14.0/</link>
      <description>Catch VHDL bugs before simulation: a fast Rust formatter and linter with VSG-compatible rules and configuration.</description>
      <pubDate>Tue, 22 Sep 2026 22:02:10 GMT</pubDate>
    </item>    <item>
      <title>0.13.0</title>
      <link>https://pypi.org/project/speja/0.13.0/</link>
      <description>Catch VHDL bugs before simulation: a fast Rust formatter and linter with VSG-compatible rules and configuration.</description>
      <pubDate>Tue, 22 Sep 2026 15:15:05 GMT</pubDate>
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