https://pypi.org/project/veriloggen/ Recent updates to the Python Package Index for veriloggen en https://pypi.org/project/veriloggen/2.3.0/ A Mixed-Paradigm Hardware Construction Framework Tue, 12 Sep 2023 01:10:34 GMT https://pypi.org/project/veriloggen/2.2.0/ A Mixed-Paradigm Hardware Construction Framework Fri, 24 Mar 2023 08:23:28 GMT https://pypi.org/project/veriloggen/2.1.1/ A Mixed-Paradigm Hardware Construction Framework Sun, 30 Oct 2022 02:46:00 GMT https://pypi.org/project/veriloggen/2.1.0/ A Mixed-Paradigm Hardware Construction Framework Mon, 04 Apr 2022 13:57:38 GMT https://pypi.org/project/veriloggen/2.0.2/ A Mixed-Paradigm Hardware Construction Framework Sat, 24 Jul 2021 08:40:10 GMT https://pypi.org/project/veriloggen/2.0.1/ A Mixed-Paradigm Hardware Construction Framework Sun, 18 Jul 2021 15:18:15 GMT https://pypi.org/project/veriloggen/2.0.0/ A Mixed-Paradigm Hardware Construction Framework Tue, 08 Jun 2021 18:27:52 GMT https://pypi.org/project/veriloggen/1.9.9/ A Mixed-Paradigm Hardware Construction Framework Mon, 24 May 2021 16:57:32 GMT https://pypi.org/project/veriloggen/1.8.9/ A Mixed-Paradigm Hardware Construction Framework Mon, 24 May 2021 16:55:52 GMT https://pypi.org/project/veriloggen/1.9.8/ A Mixed-Paradigm Hardware Construction Framework Thu, 06 May 2021 05:45:21 GMT https://pypi.org/project/veriloggen/1.9.7/ A Mixed-Paradigm Hardware Construction Framework Wed, 28 Apr 2021 16:33:07 GMT https://pypi.org/project/veriloggen/1.8.8/ A Mixed-Paradigm Hardware Construction Framework Wed, 28 Apr 2021 16:32:13 GMT https://pypi.org/project/veriloggen/1.9.6/ A Mixed-Paradigm Hardware Construction Framework Tue, 20 Apr 2021 16:56:59 GMT https://pypi.org/project/veriloggen/1.8.7/ A Mixed-Paradigm Hardware Construction Framework Tue, 20 Apr 2021 16:56:08 GMT https://pypi.org/project/veriloggen/1.9.5/ A Mixed-Paradigm Hardware Construction Framework Tue, 20 Apr 2021 15:18:01 GMT https://pypi.org/project/veriloggen/1.8.6/ A Mixed-Paradigm Hardware Construction Framework Tue, 20 Apr 2021 15:16:35 GMT https://pypi.org/project/veriloggen/1.9.4/ A Mixed-Paradigm Hardware Construction Framework Tue, 30 Mar 2021 16:33:50 GMT https://pypi.org/project/veriloggen/1.8.5/ A Mixed-Paradigm Hardware Construction Framework Fri, 26 Mar 2021 08:44:08 GMT https://pypi.org/project/veriloggen/1.9.3/ A Mixed-Paradigm Hardware Construction Framework Tue, 16 Mar 2021 16:24:57 GMT https://pypi.org/project/veriloggen/1.8.4/ A Mixed-Paradigm Hardware Construction Framework Tue, 16 Mar 2021 11:24:54 GMT https://pypi.org/project/veriloggen/1.9.2/ A Mixed-Paradigm Hardware Construction Framework Mon, 15 Mar 2021 17:36:10 GMT https://pypi.org/project/veriloggen/1.8.3/ A Mixed-Paradigm Hardware Construction Framework Mon, 15 Mar 2021 14:56:06 GMT https://pypi.org/project/veriloggen/1.9.1/ A Mixed-Paradigm Hardware Construction Framework Sun, 24 Jan 2021 13:08:46 GMT https://pypi.org/project/veriloggen/1.9.0/ A Mixed-Paradigm Hardware Construction Framework Thu, 31 Dec 2020 16:24:52 GMT https://pypi.org/project/veriloggen/1.8.2/ A Mixed-Paradigm Hardware Construction Framework Sun, 03 May 2020 13:15:04 GMT https://pypi.org/project/veriloggen/1.8.1/ A Mixed-Paradigm Hardware Construction Framework Sat, 30 Nov 2019 04:53:35 GMT https://pypi.org/project/veriloggen/1.8.0/ A library for constructing a Verilog HDL source code in Python Tue, 19 Nov 2019 11:19:47 GMT https://pypi.org/project/veriloggen/1.7.3/ A library for constructing a Verilog HDL source code in Python Thu, 29 Aug 2019 08:49:25 GMT https://pypi.org/project/veriloggen/1.7.2/ A library for constructing a Verilog HDL source code in Python Thu, 25 Jul 2019 07:01:20 GMT https://pypi.org/project/veriloggen/1.7.1/ A library for constructing a Verilog HDL source code in Python Wed, 08 May 2019 09:39:13 GMT https://pypi.org/project/veriloggen/1.7.0/ A library for constructing a Verilog HDL source code in Python Tue, 07 May 2019 07:12:22 GMT https://pypi.org/project/veriloggen/1.6.0/ A library for constructing a Verilog HDL source code in Python Thu, 18 Apr 2019 07:16:07 GMT https://pypi.org/project/veriloggen/1.5.4/ A library for constructing a Verilog HDL source code in Python Tue, 11 Dec 2018 04:19:04 GMT https://pypi.org/project/veriloggen/1.5.3/ A library for constructing a Verilog HDL source code in Python Sun, 02 Dec 2018 23:45:55 GMT https://pypi.org/project/veriloggen/1.5.2/ A library for constructing a Verilog HDL source code in Python Thu, 29 Nov 2018 07:19:30 GMT https://pypi.org/project/veriloggen/1.5.1/ A library for constructing a Verilog HDL source code in Python Sun, 25 Nov 2018 15:28:01 GMT https://pypi.org/project/veriloggen/1.5.0/ A library for constructing a Verilog HDL source code in Python Sun, 25 Nov 2018 03:56:43 GMT https://pypi.org/project/veriloggen/1.4.4/ A library for constructing a Verilog HDL source code in Python Wed, 21 Nov 2018 14:45:06 GMT https://pypi.org/project/veriloggen/1.4.3/ A library for constructing a Verilog HDL source code in Python Wed, 21 Nov 2018 14:25:49 GMT https://pypi.org/project/veriloggen/1.4.2/ A library for constructing a Verilog HDL source code in Python Wed, 21 Nov 2018 11:21:28 GMT