6 projects
openlane
An infrastructure for implementing chip design flows
ioplace-parser
Antlr4-based parser for the OpenLane I/O Placement script
nl2bench
Converts from combinational netlists to the BENCH format for DFT
volare
An open_pdks PDK builder/version manager
libparse
Python wrapper around Yosys' libparse module
spef-extractor
A parasitics estimator based on layout and technology files.