Causal depthwise conv1d in CUDA with a PyTorch interface
Features:
- Support fp32, fp16, bf16.
- Kernel size 2, 3, 4.
How to use
from causal_conv1d import causal_conv1d_fn
def causal_conv1d_fn(x, weight, bias=None, activation=None):
"""
x: (batch, dim, seqlen)
weight: (dim, width)
bias: (dim,)
activation: either None or "silu" or "swish"
out: (batch, dim, seqlen)
"""
Equivalent to:
import torch.nn.functional as F
F.conv1d(x, weight.unsqueeze(1), bias, padding=width - 1, groups=dim)[..., :seqlen]
Additional Prerequisites for AMD cards
Patching ROCm
If you are on ROCm 6.0, run the following steps to avoid errors during compilation. This is not required for ROCm 6.1 onwards.
-
Locate your ROCm installation directory. This is typically found at
/opt/rocm/, but may vary depending on your installation. -
Apply the Patch. Run with
sudoin case you encounter permission issues.patch /opt/rocm/include/hip/amd_detail/amd_hip_bf16.h < rocm_patch/rocm6_0.patch
Release files for causal-conv1d 1.5.0.post8
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Source distribution (sdist)
| File | Size | Uploaded | |
|---|---|---|---|
| causal_conv1d-1.5.0.post8.tar.gz | 9.4 kB | Details |
Release files / causal_conv1d-1.5.0.post8.tar.gz
| Download URL | causal_conv1d-1.5.0.post8.tar.gz |
|---|---|
| Size | 9.4 kB |
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