FABulous bit_gen
Bitstream generation utilities for FABulous FPGA fabrics.
This package provides functionality for generating bitstreams from FASM (FPGA Assembly) files for FABulous FPGA fabrics. It handles the conversion of place-and-route results into configuration bitstreams that can be loaded onto the FPGA fabric.
Features
- Parse FASM files containing FPGA configuration features
- Process configuration bits according to bitstream specifications
- Generate bitstream output in multiple formats:
- Binary (.bin)
- CSV (.csv)
- Verilog header (.vh)
- VHDL package (.vhd)
Installation
pip install FABulous-bit-gen
Usage
Command Line
bit_gen -genBitstream input.fasm spec.pkl output.bin
Python API
from fabulous_bit_gen import gen_bitstream
gen_bitstream("input.fasm", "spec.pkl", "output.bin")
License
Apache Software License 2.0
Metadata
Release files for FABulous-bit-gen 0.3.1
For a detailed explanation of source distributions (sdists) and built distributions (wheels), please see the package formats documentation.
Source distribution (sdist)
| File | Size | Uploaded | |
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| fabulous_bit_gen-0.3.1.tar.gz | 4.1 MB | Details |
Built distribution (wheel)
| File | Interpreter | ABI | Platform | Reset |
|---|---|---|---|---|
| fabulous_bit_gen-0.3.1-py3-none-any.whl | Python 3 | none | any | Details |
Total release size: 4.1 MB
Release files / fabulous_bit_gen-0.3.1.tar.gz
| Download URL | fabulous_bit_gen-0.3.1.tar.gz |
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| Size | 4.1 MB |
| Tags | Source |
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| Tags | Python 3 |
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