Flatten Verilog filelists: resolve -f includes, expand env vars, filter preprocessor conditionals
Project description
flatten-filelist
Flatten Verilog filelists by resolving -f includes, expanding environment variables, and filtering preprocessor conditionals.
Install
pip install flatten-filelist
Usage
import flatten_filelist
content, errors = flatten_filelist.flatten_filelist("filelist.f", ["DEFINE1", "DEFINE2"])
Returns (content_lines, error_messages) — errors are collected, not fatal.
How it works
- Recursively follows
-f <path>include directives - Expands
$VARand${VAR}in paths using environment variables - Evaluates Verilog preprocessor conditionals:
`ifdef,`ifndef,`elsif,`else,`endif - Accumulates
`defineand-defmacros encountered in active conditional branches - Supports wildcard mode (
"*"directive includes all conditional branches)
Platform
Linux x86_64 only. Bundles a statically-linked musl binary that runs on any Linux kernel ≥2.6.
Project details
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- Tags: Python 3
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Provenance
The following attestation bundles were made for flatten_filelist-0.1.1-py3-none-any.whl:
Publisher:
publish.yml on huanghhhz/flatten-filelist
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https://in-toto.io/Statement/v1 -
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huanghhhz/flatten-filelist@11323fd8f8bfd2be4b379cf14e2a268859ce8dce -
Branch / Tag:
refs/tags/v0.1.1 - Owner: https://github.com/huanghhhz
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public
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