Machine learning in FPGAs using HLS
A package for machine learning inference in FPGAs. We create firmware implementations of machine learning algorithms using high level synthesis language (HLS). We translate traditional open-source machine learning package models into HLS that can be configured for your use-case!
Documentation & Tutorial
For more information visit the webpage: https://fastmachinelearning.org/hls4ml/
Detailed tutorials on how to use
hls4ml's various functionalities can be found here.
pip install hls4ml
To install the extra dependencies for profiling:
pip install hls4ml[profiling]
Creating an HLS project
import hls4ml #Fetch a keras model from our example repository #This will download our example model to your working directory and return an example configuration file config = hls4ml.utils.fetch_example_model('KERAS_3layer.json') print(config) #You can print the configuration to see some default parameters #Convert it to a hls project hls_model = hls4ml.converters.keras_to_hls(config) # Print full list of example models if you want to explore more hls4ml.utils.fetch_example_list()
Building a project with Xilinx Vivado HLS (after downloading and installing from here)
Note: Vitis HLS is not yet supported. Vivado HLS versions between 2018.2 and 2020.1 are recommended.
#Use Vivado HLS to synthesize the model #This might take several minutes hls_model.build() #Print out the report if you want hls4ml.report.read_vivado_report('my-hls-test')
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