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Logic Minimization

## Project description

Minimize logic functions.

## Description

LogicMin is a Python package that minimize boolean functions using the tabular method of minimization (Quine-McCluskey). An object represent a truth table to which rows are added. After all rows are added, call a solve function.The solve function returns the minimized Sum of Products. The sum of products can be printed or analyzed.

• Edward J. McCluskey. 1986. Logic Design Principles with Emphasis on Testable Semicustom Circuits. Prentice-Hall, Inc., Upper Saddle River, NJ, USA.
• John F. Wakerly. 1989. Digital Design Principles and Practices. Prentice-Hall, Inc., Upper Saddle River, NJ, USA.

```# Full-adder
import logicmin
# truth table 3 inputs, 2 outputs
t = logicmin.TT(3,2);
# add rows to the truth table (input, ouutput)
# ci a b  |  s co
# minimize functions and get
# solution for analysis and print
sols = t.solve()
# print solution mapped to var names (xnames=inputs, ynames=outputs)
print(sols.printN(xnames=['Ci','a','b'],ynames=['s','Co'], info=True))
```

Output:

```Co <= a.b + Ci.b + Ci.a
s <= Ci'.a'.b + Ci'.a.b' + Ci.a'.b' + Ci.a.b
```

Get expression in VHDL syntax:

```print(sols.printN(xnames=['Ci','a','b',ynames=['s','Co'], syntax='VHDL'))
```

Output:

```Co <= a and b or Ci and b or Ci and a
s <=  not(Ci) and  not(a) and b or  not(Ci) and a and  not(b) or Ci and  not(a) and  not(b) or Ci and a and b
```

## BCD to 7 segment converter

```# BCD-8421 to 7 segment
import logicmin
t = logicmin.TT(4,7);
# b3 b2 b1 b0  | a b c d e f g
# Outputs minimized independently
sols = t.solve()
print(sols.printN( xnames=['b3','b2','b1','b0'], ynames=['a','b','c','d','e','f','g']))
```

Output:

```g <= b2'.b1 + b2.b1' + b2.b0' + b3
f <= b1'.b0' + b2.b1' + b2.b0' + b3
e <= b2'.b0' + b1.b0'
d <= b2.b1'.b0 + b2'.b0' + b2'.b1 + b1.b0'
c <= b1' + b0 + b2
b <= b1'.b0' + b1.b0 + b2'
a <= b2'.b0' + b1.b0 + b2.b0 + b3
```

## Finite-state machines

For finite-state machines, use the FSM object.

## Binary counter with hold

```# Finite-state machine
# x=0 => hold
# x=1 => binary up count
# y = 1 in states: e1 and e3
import logicmin
# state labels
states = ['e0','e1','e2','e3']
# 2 bits for state codes
# 1 input variable
# 1 output variable
m = logicmin.FSM(states,2,1,1)
# transition table
# asign code to states
codes = {'e0':0,'e1':1,'e2':2,'e3':3}
m.assignCodes(codes)
# solve with D flip-flops
sols = m.solveD()
# print solution with input and output names
print(sols.printN(xnames=['X','Q1','Q0'], ynames=['D1','D0','Y']))
```

Output:

```Y <= Q0
D0 <= X'.Q0 + X.Q0'
D1 <= X.Q1'.Q0 + X'.Q1 + Q1.Q0'
```

The advantages of FSM objects are

1. Names for the states
2. Decouple state code assignment from table initialization.

## Other examples

Look into examples directory.

## Install

```pip install logicmin
```