RAVEL
RAVEL (Rate-Aware Vectorized Engine for Low-latency) generates a specialized,
hls4ml-compatible FPGA inference project. Aria 1.5.1 analyzes qualified
Keras/HGQ2 models through hls4ml's ModelGraph, extracts learned fixed-point
types and parameters, and resolves P2/P4 temporal packing with Dense x1/x2.
New conversions default to P4/D2 with sequential packed Dense weights.
The model family is capable of processing an 8-channel ADC stream with a rate of up to 4.4 GSa/s on the KU5P.
This model distinguishes in real time between neutrino signals generated by Askaryn Radiation and noise, and can detect over 99% of neutrinos at a trigger rate of 1 Hz.
Performance
Like-for-like comparison
Same model, hls4ml configuration, KU5P target, and 5 ns clock constraint. OOC resources and WNS are single-core Vivado 2023.2 post-route results. Resource counts are followed by KU5P utilization. II means Initiation Interval.
| Flow | II | Latency (cycles) | HLS clock (ns) | OOC BRAM tile | OOC DSP | OOC registers | OOC LUTs | OOC WNS (ns) |
|---|---|---|---|---|---|---|---|---|
| Vanilla hls4ml | 3076 | 3084 | 3.619 | 5.5 (1.15%) | 1 (0.05%) | 21745 (5.01%) | 18312 (8.44%) | +0.206 |
| RAVEL Aria 1.1.0 P2/D1 | 178 | 183 | 3.647 | 1.0 (0.21%) | 7 (0.38%) | 2953 (0.68%) | 5332 (2.46%) | +1.121 |
| RAVEL Aria 1.3.0 P4/D2 | 94 | 99 | 3.502 | 0.5 (0.10%) | 14 (0.77%) | 3709 (0.85%) | 7861 (3.62%) | +0.817 |
| RAVEL Aria 1.4.0 P4/D2 | 94 | 99 | 3.402 | 1.5 (0.31%) | 15 (0.82%) | 3622 (0.83%) | 6981 (3.22%) | +0.524 |
At 200 MHz, 1 GSa/s equals 3.90625 million 256-sample chunks/s and requires 60.08/3.48/1.84/1.84 equivalent cores for vanilla/Aria 1.1/1.3/1.4. Relative to vanilla, Aria 1.1/1.3/1.4 reduce equivalent core count by 94.2%/96.9%/96.9%, BRAM by 98.9%/99.7%/99.2%, DSP by 59.5%/57.2%/54.2%, registers by 99.2%/99.5%/99.5%, and LUTs by 98.3%/98.7%/98.8%. These linearized estimates allow fractional core counts and exclude all other FPGA logic.
The throughput requirements of ARIANNA, RNO-G, and IceCube-Gen2 are already met by the current system design (AI Trigger System, v3.3.0). For models with similar architectures and size, processing speed and power consumption are no longer limiting factors.
More Information about the reference implementation, please see the performance of the CNN-Core-Generator.
Install
Use a clean Python 3.11 virtual environment on Linux:
python -m pip install ravel-hls
Python API
import ravel_hls as ravel
config = {
"HLS": {
"Backend": "Vitis",
"IOType": "io_stream",
"Part": "xcku5p-ffvb676-2-e",
"ClockPeriod": 5.0,
},
"Verification": {"Mode": "required", "Samples": 32, "Seed": 19},
"Vitis": {"Run": False},
}
analysis = ravel.analyze("model.keras", config)
project = ravel.convert("model.keras", "cnn_core", config)
print(project.status)
Optimization is optional. Omission selects the versioned aggressive default:
config["Optimization"] = {
"TemporalPacking": 2, # 2 or 4
"DenseParallelism": 1, # 1 or 2
}
Each axis may be set independently; an omitted axis keeps its aggressive
default. ravel.refresh(project, model_or_parameters) reuses the recorded
architecture contract and rejects changes that require an ordinary conversion.
Vitis.Run defaults to False. Set it to True to run
vitis_hls -f build_prj.tcl after atomic project publication and automatically
record the synthesis report. The default Vitis stages are reset and synthesis;
CSim, CoSim, validation, export, and Vivado synthesis remain disabled unless
their booleans under Vitis.Stages are enabled explicitly. The same operation
can be requested later with project.build().
The concise project lifecycle is analyze, convert, refresh,
Project.open(path),
project.build(), project.record(report_dir), and project.link(). The CLI
command ravel-hls inspect PROJECT --json performs full source-integrity
checking; add --fast when payload hashing should be skipped.
Parameter packages
Parameters stores portable generation-relevant inference state without
generated HLS sources or executable Python objects:
parameters = ravel.Parameters.extract(model)
parameters.save("trained.ravelparams")
project = ravel.Project.open("cnn_core")
project.refresh(ravel.Parameters.load("trained.ravelparams"))
The schema-v2 deterministic archive contains JSON plus NPY arrays compiled from
the clean ModelGraph. Tensors are addressed by canonical operation and role,
not Keras layer names or variable order. Structure, numeric descriptors, and
layered hashes are checked before complete staged regeneration. Without
embedded known-answer evidence, package refresh can prove baseline-to-optimized
equivalence in auto mode but required mode rejects it. A package is not
encrypted.
Other Information
See the executable CNN-for-Arianna reference, architecture, compatibility, and project format for the full contracts. The Aria 1.5.1 RTL evidence records the fixed three-model release subset and its throughput/resource tradeoff.
Our Project used RAVEL
The Future Plan
RAVEL will evolve from the closed, qualified specialization flow into a general rate-aware FPGA inference generator. Plans for higher versions are tentative.
Higher versions will focus primarily on expanding functionality and model support. At present, Nocturne 2.0 is expected to bring the target model into its highest practical throughput range. Further versions may still achieve higher throughput, but the remaining headroom is expected to be quite limited.
- Aria 1.x Continue improving the closed P2/P4 x D1/D2 specialization set, deterministic project lifecycle, verification, and tool compatibility. For this version, RAVEL's goal is simply to design an efficient converter for models currently in use or planned for use for high-energy neutrino experiments, e.g., ARIANNA, RNO-G, and IceCube-Gen2.
- Nocturne 2.x Generalize model support, add P8 where system bandwidth and scheduling permit it, and derive balanced layer-level parallelism.
- Rhapsody 3.x Support multiple independent inference contexts within one IP, with configurable resource sharing, duplication.
- Requiem 4.x Select internal parallelism, IP replication, and lane scheduling according to input rate, internal interval, latency, and FPGA resource constraints.
License
This project licensed under Apache-2.0. See LICENSE.
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