riscv-emulator 0.1.0

A Python-based RISC-V assembler, emulator, disassembler, and debugger

🖥️ RISC-V Emulator

A simple RISC-V assembler, emulator, and disassembler written in Python.
It can be used both as a command-line tool and as a Python library.

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✨ Features

• Assemble .s RISC-V assembly files into binary machine code
• Run binary files on a simple RISC-V CPU emulator
• Disassemble binary files back into readable assembly
• One-step assemble-and-run mode
• Works as both CLI tool and importable Python package

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📦 Installation

From PyPI:

pip install riscv-emulator

From source:

git clone https://github.com/yourusername/riscv_emulator.git
cd riscv_emulator
pip install .

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🚀 Usage

CLI Commands

# Assemble a file
riscv assemble program.s -o program.bin

# Run a binary
riscv run program.bin

# Assemble and run in one step
riscv full program.s

# Disassemble a binary
riscv disassemble program.bin

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Python API

from riscv_emulator import assemble, emulator, disassemble

# Assemble
assemble("program.s", "program.bin")

# Run
emu = emulator()
emu.load_program("program.bin")
emu.run()

# Disassemble
disassemble("program.bin")

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📂 Project Structure

riscv_emulator/
├── riscv_emulator/
│   ├── __init__.py
│   ├── assembler.py
│   ├── debugger.py
│   ├── disassembler.py
│   ├── emulator.py
│   ├── main.py
├── README.md
├── pyproject.toml
├── LICENSE

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📝 License

This project is licensed under the terms of the MIT License.
See the LICENSE file for details.

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💡 Example

Example assembly file (program.s):

addi x1, zero, 3
addi x2, zero, 4
add  x3, x1, x2

Run it:

riscv full program.s

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🤝 Contributing

Pull requests are welcome!
If you find a bug or have a feature request, please open an issue on GitHub.

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🛠 Requirements

• Python 3.8+
• No external dependencies