Resources for working with RISC-V in Python
Project description
riscvlib
Resources for working with RISC-V assembly in Python. Supporting instruction creation, pseudo instruction translation and register lookup for extenions:
- I Base Instruction Set
- M Multiply and Divide
- F Single precision floating point
- B (Zba, Zbb, Zbc, Zbs) bit manipulation
- Zifencei ebreak and ecall
- Zicsr Control Status Register instructions
Installation
The package can be installed using pip:
$ pip install riscvlib
Examples
Instruction, Static creation from a string
>> from riscvlib.instruction import Instruction
>> i = Instruction.from_line("add x1, x2, x3")
>> print(i)
add x1, x2, x3
>> i.to_bytes()
b'\xb3\x001\x00'
>> i
RInstruction 'add' ['x1', 'x2', 'x3']
Specific Instruction Type
>> from riscvlib.instruction import RInstruction, IInstruction
>> r_instr = RInstruction("add", "x1", "x2", "a2")
>> print(r_instr)
add x1, x2, a2
>> i_instr = IInstruction("andi", "a0", "a1", -13)
>> print(i_instr)
andi a0, a1, -13
>> i_instr.to_bytes() # note: bytes are 'little endian' ordered
b'\x13\xf55\xff'
>> i = CSRInstruction('csrrw', 'x1', 'mie', 'x5')
>> i.to_bitstring()
"00110000010000101001000011110011"
Pseudo Instruction Translation
>> from riscvlib.instruction import translate_pseudo_instruction
>> out_list = translate_pseudo_instruction("mv", "a0", "x30")
>> print(out_list)
['addi a0, x30, 0']
>> out_list = translate_pseudo_instruction("la", "a0", "400")
>> print(out_list)
['lui a0, %hi(400)', 'addi a0, a0, %lo(400)']
Instruction Data
>> from riscvlib.risvdata import INSTRUCTION_MAP
>> INSTRUCTION_MAP['mul']
('MUL', '0110011', '000', '0000001', 'R', 'm', '32/64')
# (name, opcode, func3, func7, itype, extension, rv32/rv64)
oppcode, func3, func7 = INSTRUCTION_MAP['fmadd.s'][1:4]
Project Intent
The project has reached the MVP(Minimum Viable Product) state. It does what I want it to do, and I am reasonably sure that no major bugs exist. I built this to use in my own projects after I found Python Risc-v tools somewhat lacking. I will fix bugs as they crop up. I will add features as I need them, or as they are requested.
This is not an industrial strength library and is targeted at hobbyists/educational use. I've made readability, ease of use and simplicity priorities.
No warranties either stated or implied are associated with this project.
Use the code, or just copy the data that I've compiled from multiple sources, often conflicting with each other on the exact details.
Limitations
- F extension Rounding Modes hardcoded to 'Nearest'(000)
Future
- A, C and D extensions
Project details
Release history Release notifications | RSS feed
Download files
Download the file for your platform. If you're not sure which to choose, learn more about installing packages.
Source Distribution
Built Distribution
Filter files by name, interpreter, ABI, and platform.
If you're not sure about the file name format, learn more about wheel file names.
Copy a direct link to the current filters
File details
Details for the file riscvlib-0.7.1.tar.gz.
File metadata
- Download URL: riscvlib-0.7.1.tar.gz
- Upload date:
- Size: 14.1 kB
- Tags: Source
- Uploaded using Trusted Publishing? Yes
- Uploaded via: twine/6.1.0 CPython/3.12.9
File hashes
| Algorithm | Hash digest | |
|---|---|---|
| SHA256 |
222eb46da1ba7f9746d40b3840bc14e471ae149154bd7d9dd88ee8f8dbf0cb88
|
|
| MD5 |
b06e44ac6baa060c39f09eafb3722e0d
|
|
| BLAKE2b-256 |
71b35397bf06916c0e34c00e22ceeb3dac1cf1ade940d0e063f8a2b59b9e6142
|
Provenance
The following attestation bundles were made for riscvlib-0.7.1.tar.gz:
Publisher:
python-publish.yml on Mike451/riscvlib
-
Statement:
-
Statement type:
https://in-toto.io/Statement/v1 -
Predicate type:
https://docs.pypi.org/attestations/publish/v1 -
Subject name:
riscvlib-0.7.1.tar.gz -
Subject digest:
222eb46da1ba7f9746d40b3840bc14e471ae149154bd7d9dd88ee8f8dbf0cb88 - Sigstore transparency entry: 196315839
- Sigstore integration time:
-
Permalink:
Mike451/riscvlib@c5be311e31bb653ddbde8833eba21eff11db7251 -
Branch / Tag:
refs/tags/v0.7.1 - Owner: https://github.com/Mike451
-
Access:
public
-
Token Issuer:
https://token.actions.githubusercontent.com -
Runner Environment:
github-hosted -
Publication workflow:
python-publish.yml@c5be311e31bb653ddbde8833eba21eff11db7251 -
Trigger Event:
release
-
Statement type:
File details
Details for the file riscvlib-0.7.1-py3-none-any.whl.
File metadata
- Download URL: riscvlib-0.7.1-py3-none-any.whl
- Upload date:
- Size: 14.0 kB
- Tags: Python 3
- Uploaded using Trusted Publishing? Yes
- Uploaded via: twine/6.1.0 CPython/3.12.9
File hashes
| Algorithm | Hash digest | |
|---|---|---|
| SHA256 |
b4d3e299a8ae8365a93c95be1a80159fcc58093b3e765c8294d6ebf8e87729f1
|
|
| MD5 |
44197eeea8f249bff2d87defc13d724e
|
|
| BLAKE2b-256 |
a0d539e6abcd2de522e18407626e08afdc90091f8013c56826432b19f593a945
|
Provenance
The following attestation bundles were made for riscvlib-0.7.1-py3-none-any.whl:
Publisher:
python-publish.yml on Mike451/riscvlib
-
Statement:
-
Statement type:
https://in-toto.io/Statement/v1 -
Predicate type:
https://docs.pypi.org/attestations/publish/v1 -
Subject name:
riscvlib-0.7.1-py3-none-any.whl -
Subject digest:
b4d3e299a8ae8365a93c95be1a80159fcc58093b3e765c8294d6ebf8e87729f1 - Sigstore transparency entry: 196315840
- Sigstore integration time:
-
Permalink:
Mike451/riscvlib@c5be311e31bb653ddbde8833eba21eff11db7251 -
Branch / Tag:
refs/tags/v0.7.1 - Owner: https://github.com/Mike451
-
Access:
public
-
Token Issuer:
https://token.actions.githubusercontent.com -
Runner Environment:
github-hosted -
Publication workflow:
python-publish.yml@c5be311e31bb653ddbde8833eba21eff11db7251 -
Trigger Event:
release
-
Statement type: