rv_profile

This project implements a cycle-accurate RISC-V profiler that extracts the cycles spent in each function from RTL simulations.

An interactive example is found here.

Installing

pip install rv-profile

Using

To profile a waveform you need to have a RISC-V .elf binary and a .vcd/.fst waveform of a RISC-V core running the binary. This repository contains an example for the cv32e40x core. More will be added in the future.

rv_profile --elf <.elf> --fst <.vcd/.fst file> --cfg <.wal file> [--out <flamegraph.svg>]

Adapting to Other Cores

To adapt a new core to this script is easy. All you have to do is to know the name of the clk signal, detect when an instruction is committed, which address this instruction had and the raw value of the instruction (i.e. the 32-bit value). This information can then be entered in a new config.wal file just like the ones in cv32e40x.

The config file specifies

(alias clk          ...cv32e40x_core_i.clk                              )
(alias pc           ...cv32e40x_core_i.debug_pc_o                       )
(alias instr        ...cv32e40x_core_i.ex_wb_pipe.instr.bus_resp.rdata  )
(alias fire-signal  ...cv32e40x_core_i.debug_pc_valid_o                 )
(alias mcycle       ...cv32e40x_core_i.cs_registers_i.mcycle_o          )

So you have to change (alias clk ....) to (alias clk your.clk.signal)

Contributing

If you want to contribute to this project, please open an issue or a pull request. We are happy to help you with any questions you might have.

If you use this tool on a different RISC-V core please open a pull request so that we can include it in the repository.

Repositories that made this possible

• RISC-V Function Profiling
• WAL
• FlameGraph.