SIRC - Digital Logic and Circuit Simulation Engine
Project description
SIRC
SIRC - Digital Logic and Circuit Simulation Engine
SIRC is a lightweight, fully typed Python library for simulating digital logic at the transistor level. It models Nodes, Devices, and Transistors and computes stable LogicValues through fixed-point iteration and dynamic connectivity.
📦 Installation
Install from PyPI:
pip install sirc
Import the device simulator:
from sirc.simulator.device import DeviceSimulator
🚀 Quick Start
from sirc.simulator.device import DeviceSimulator
from sirc.core.logic import LogicValue
from sirc.core.transistor import NMOS, PMOS
from sirc.core.device import VDD, GND, Input, Probe, Port
sim = DeviceSimulator()
# Create Devices and Transistors
vdd = VDD()
gnd = GND()
inp = Input()
probe = Probe()
inp_port = Port()
out_port = Port()
pmos = PMOS()
nmos = NMOS()
# Register Devices and Transistors
sim.register_devices([vdd, gnd, inp, probe, inp_port, out_port])
sim.register_transistors([pmos, nmos])
# Connect Components
sim.connect(inp.terminal, inp_port.terminal)
sim.connect(inp_port.terminal, pmos.gate)
sim.connect(inp_port.terminal, nmos.gate)
sim.connect(vdd.terminal, pmos.source)
sim.connect(gnd.terminal, nmos.source)
sim.connect(pmos.drain, out_port.terminal)
sim.connect(nmos.drain, out_port.terminal)
sim.connect(out_port.terminal, probe.terminal)
# Simulate and Sample Output
inp.set_value(LogicValue.ONE)
sim.tick()
print(repr(probe.sample()))
# Change Input and Resimulate
inp.set_value(LogicValue.ZERO)
sim.tick()
print(repr(probe.sample()))
🔧 Features
Core Devices
VDDGNDInputProbePort
Transistors
NMOSPMOS
Fully Typed
from sirc.simulator.device import DeviceSimulator
from sirc.core.logic import LogicValue
from sirc.core.node import Node
from sirc.core.device import LogicDevice, VDD, GND, Input, Probe, Port
from sirc.core.transistor import Transistor, NMOS, PMOS
📂 Project Structure
src/
sirc/
core/
device.py
logic.py
node.py
transistor.py
simulator/
device.py
tests/
sirc/
core/
test_device.py
test_logic.py
test_node.py
test_transistor.py
simulator/
test_device.py
🧪 Testing
Run the full test suite:
pytest
📝 License
MIT License
🔗 Links
- PyPI: https://pypi.org/project/sirc/
- Source Code: https://github.com/CRISvsGAME/sirc
Project details
Download files
Download the file for your platform. If you're not sure which to choose, learn more about installing packages.
Source Distribution
Built Distribution
Filter files by name, interpreter, ABI, and platform.
If you're not sure about the file name format, learn more about wheel file names.
Copy a direct link to the current filters
File details
Details for the file sirc-1.0.0.tar.gz.
File metadata
- Download URL: sirc-1.0.0.tar.gz
- Upload date:
- Size: 9.4 kB
- Tags: Source
- Uploaded using Trusted Publishing? No
- Uploaded via: twine/6.2.0 CPython/3.12.3
File hashes
| Algorithm | Hash digest | |
|---|---|---|
| SHA256 |
c59d80a17bb7810f890092543e09cad74e8dd8e5e7774541f1864b0d92a5ae9d
|
|
| MD5 |
fb3784bb4f7a16666f9eb927cc0bfc31
|
|
| BLAKE2b-256 |
7c3083377c9ebeb82d838f9f7923b08317ca639ae9c8bfd9aba43c1bd8d1abf3
|
File details
Details for the file sirc-1.0.0-py3-none-any.whl.
File metadata
- Download URL: sirc-1.0.0-py3-none-any.whl
- Upload date:
- Size: 11.4 kB
- Tags: Python 3
- Uploaded using Trusted Publishing? No
- Uploaded via: twine/6.2.0 CPython/3.12.3
File hashes
| Algorithm | Hash digest | |
|---|---|---|
| SHA256 |
0c452f2c174c44e748d43fb2f4c810e4e20d5a50a75c19fd6f8bdded06396be3
|
|
| MD5 |
bd051757025f0bb9ee1920a01d2ab382
|
|
| BLAKE2b-256 |
e646b9f5f3ec2689c93bca045881063a4ace6474fb1b5e297ae86f81e3818650
|