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  Joined on Jun 28, 2016

3 Projects


Last released on Dec 13, 2017

hdl synthesis toolkit


Last released on Dec 13, 2017

library of hardware components and test for HWToolkit framework (FPGA devel. tools)


Last released on Dec 9, 2017

Vhdl and verilog parser written in c++, this module is primary used for hw_toolkit library for hdl manipulation

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