🐍 ChipScoPy README
ChipScoPy is an open-source project from Xilinx® that enables high-level control of Versal debug IP running in hardware. Using a simple Python API, developers can control and communicate with ChipScope® debug IP such as the Integrated Logic Analyzer (ILA), Virtual IO (VIO), device memory access, and more.
ChipScoPy communicates with Versal devices. It does not work with older devices such as Ultrascale+ and 7-Series devices.
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Metadata
3 maintainers
Release files for chipscopy 2023.2.1702018464
For a detailed explanation of source distributions (sdists) and built distributions (wheels), please see the package formats documentation.
Source distribution (sdist)
| File | Size | Uploaded | |
|---|---|---|---|
| chipscopy-2023.2.1702018464.tar.gz | 9.9 MB | Details |
Built distribution (wheel)
| File | Interpreter | ABI | Platform | Reset |
|---|---|---|---|---|
| chipscopy-2023.2.1702018464-py3-none-any.whl | Python 3 | none | any | Details |
Total release size: 20.0 MB
Release files / chipscopy-2023.2.1702018464.tar.gz
| Download URL | chipscopy-2023.2.1702018464.tar.gz |
|---|---|
| Size | 9.9 MB |
| Tags | Source |
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SHA-256 checksum How to use checksums |
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poetry/1.7.1 CPython/3.10.13 Linux/6.2.0-1018-azure
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Release files / chipscopy-2023.2.1702018464-py3-none-any.whl
| Download URL | chipscopy-2023.2.1702018464-py3-none-any.whl |
|---|---|
| Size | 10.1 MB |
| Tags | Python 3 |
|
SHA-256 checksum How to use checksums |
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No |
| Uploaded via |
poetry/1.7.1 CPython/3.10.13 Linux/6.2.0-1018-azure
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