Command-line tool for control/status register automation and code generation.

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  • License: GNU Lesser General Public License v3 (LGPLv3) (LGPLv3)
  • Author: Alex Mykyta
  • Tags SystemRDL , PeakRDL , CSR , compiler , tool , registers , generator , C , header , software , Verilog , SystemVerilog , register abstraction layer , FPGA , ASIC
  • Requires: Python >=3.7
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Project description

PeakRDL command-line interface

This package implements the command-line interface for the PeakRDL toolchain.

Documentation

See the PeakRDL Documentation for more details.

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  • License: GNU Lesser General Public License v3 (LGPLv3) (LGPLv3)
  • Author: Alex Mykyta
  • Tags SystemRDL , PeakRDL , CSR , compiler , tool , registers , generator , C , header , software , Verilog , SystemVerilog , register abstraction layer , FPGA , ASIC
  • Requires: Python >=3.7
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1.5.0

1.4.0

1.3.0

1.2.3

1.2.0

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