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Compile SystemRDL into a SystemVerilog control/status register (CSR) block

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Documentation Status build PyPI - Python Version

PeakRDL-regblock

Compile SystemRDL into a SystemVerilog control/status register (CSR) block

Documentation

See the PeakRDL-regblock Documentation for more details

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peakrdl-regblock-0.5.0.tar.gz (41.1 kB view hashes)

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